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Keysight Joins Altium’s Nexar Partner Network to Enhance Electronic Design

Keysight’s PathWave ADS platform makes it easier to design printed circuit boards.

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GE Hitachi and GE Digital Develop Outage Tool for Nuclear Plant Operators

New tool will help plan and schedule maintenance outages.

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Agrivoltaics Provide Food, Power and Money: A Triple Win

Find out how agrivoltaics can provide clean energy, improve crop yields and boost the economy.

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Analog FastSPICE Is Certified for TSMC N3 and N4 Nodes

Siemens’ circuit verification platform is certified for use with TSMC’s forthcoming N3 and N4 nodes.

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One Solution to The Auto Industry Chip Shortage

Automakers will lose $110 billion dollars in revenue in 2021 because of the chip shortage. What solution could offset these losses in the long run?

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JBS Meat Processor Cyber-Attacked, Sustainable Pirelli Tires and Auto Chip Shortage Worsens

This Week in Engineering explores the latest in Engineering from academia, government and industry.

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Why Do Good Batteries Go Bad?

An examination of swelling and degradation in lithium-ion batteries.

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New Samsung PMICs Target DDR5 Performance

The power management ICs are designed for data center, server and desktop applications.

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Recommended Resources

White Paper - Siemens, AMD, and Microsoft Collaborate on EDA in the Cloud

Moving some or all of your EDA computing to the cloud enables your company to reduce time-to-market and innovate faster by taking advantage of flexible cloud resources and economies of scale.

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White Paper - Calibre in the Cloud: Unlocking Massive Scaling and Cost Efficiencies

As companies look to leverage cloud capacity for faster turnaround times on advanced process node designs, they can be confident that running Calibre in the cloud enables them to adjust their resource usage to best fit their business requirements and market demands.

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White Paper - Reducing IR and EM Issues with Automated Via Insertion

The Calibe YieldEnhancer PowerVia utility uses manufacturing requirements to perform automated insertion of DRC/LVS-clean vias. Results show significant improvements in EM/IR results, including substantial reductions in current density violations.

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White Paper - Optimizing the Integration of DFM and P&R

Design companies and foundries are constantly modifying their design implementation flows to deliver the best possible solution for their operational needs. This paper introduces a solution for fast, accurate back-annotation of fill, via, and net objects to P&R applications.

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